Tag - Wafer Level Capping
Basic idea of the wafer level capping technology is based on cap structure fabrication on a compound wafer consisting of two temporary bonded wafers.
One wafer acts as carrier wafer whereas the other wafer is treated by processes like silicon thinning, silicon dry etching, deposition and structuring of polymer or metal bonding frames and optional partial pre-dicing to form arbitrary shaped and separated cap structures.
Thus, the fabrication sequence transforms the original compound wafer into a carrier wafer with singulated, face-up mounted cap structures. The size, form, location and pitch of the cap structures matches with the devices on the corresponding target wafer, where the caps will be bonded to.
The so prepared cap donor wafer is now used in a wafer to wafer bonding process to align and bond all cap structures in parallel onto the desired positions at the target wafer. The wafer bonding process utillizes heat, pressure and defined vacuum conditions to permanently bond the seal frames of the caps with the surface of the device wafer.